Xinhua Lai (赖心华)

Xinhua Lai (赖心华)

Dedicated researcher focusing on AI for EDA, with 8 high-level publications in the EDA field, including first-author and core-contributor papers in top-tier venues such as DAC, TCAD, and ACM TODAES. Possessing strong capabilities in both algorithm innovation and system development, I previously worked as a Software Engineer at Huawei, focusing on high-performance C++ system development, large-scale network topology analysis, and graph algorithm optimization. I am also a core developer of the AiEDA open-source platform, leading its parameter optimization architecture. I have extensive practice in applying pre-trained generative models, Graph Neural Networks (GNN), and multi-modal fusion to physical design automation. As an ACM Professional Member, I am passionate about open-source contribution and knowledge sharing (GitHub 1.2k ⭐).

📖 Education

  • 2021.09 - Present, University of Chinese Academy of Sciences (UCAS), Computer Applied Technology (081203), Ph.D. candidate (Research: AI for EDA, chip placement/routing; Advisor: Jungang Xu (徐俊刚))
  • 2016.09 - 2019.06, Central South University, Software Engineering (085405), M.Eng. (Research: deep learning applications; Advisor: Xuegong Chen)
  • 2010.09 - 2014.07, Jingdezhen Ceramic University, Electronic Science and Technology (080702), B.Eng.

🔥 News

  • 2026.03: 🎉 One paper is accepted by DAC 2026!
  • 2026.02: 🎉 One paper is accepted by TCAD 2026!
  • 2025.05: 🎉 One paper is accepted by TODAES 2025!
  • 2025.01: 🎉 1k GitHub stars⭐—thanks! Feel free to star and fork!

📝 Publications

Selected Papers

Selected Patents

  • 发明专利 CN202510301466.8 芯片设计指标生成模型训练方法及装置. 徐俊刚, 赖心华
  • 发明专利 CN202411422150.6 芯片布局方法及装置. 徐俊刚, 赖心华
  • 发明专利 CN202411421641.9 芯片布局信息生成方法及装置. 徐俊刚, 赖心华
  • 发明专利 CN202210361621.1 简历解析方法及装置. 王玲, 赖心华

💻 Selected Experience

  • May 2024 - Present, Research Intern, Peng Cheng Laboratory
  • May 2025 - Jun 2025, Part-time Lecturer, School of Artificial Intelligence, Lijiang Culture and Tourism College
  • Sep 2021 - Present, Teaching Assistant (TA), University of Chinese Academy of Sciences (UCAS)
  • Aug 2020 - Aug 2021, Research Assistant, CCIP Lab, University of Chinese Academy of Sciences (UCAS)
  • Jun 2019 - Jul 2020, Software Engineer, Huawei Technologies Co., Ltd.

🤖 Selected Projects

  • Nov 2025 - Present, Multi-modal Framework for Physical Design PPA Prediction and Optimization (ISEDA 2026)
  • Nov 2024 - Present, Pre-trained Generative Framework for Routing Evaluation and Generation (DAC 2026)
  • Jul 2024 - Mar 2025, Core Module Architecture Design and Development for AiEDA Open-Source Platform (GitHub Source)
  • Mar 2024 - Dec 2024, Parallel Macro Placement Framework using Reinforcement Learning and Transformers
  • Nov 2022 - Nov 2024, Automated Placement Parameter Configuration Framework via Transfer Learning and Parallel Optimization (TODAES 2025)

🎖 Honors and Awards

  • openDACS 2025 Rising Star Award in Open-Source EDA & Chips (2025)
  • openDACS 2025 Excellence Award in Open-Source EDA & Chips Challenge (2025)
  • Best Poster, UCAS “Scientific Intelligence” Graduate Academic Forum (2025)
  • 3rd Place, Xiakedao $EDA^2$ Mixed-Size Placement Competition (2025.07)
  • UCAS Graduate Academic Scholarship (3 times) (2021-2023)
  • UCAS Merit Student (2021)

⌨️ Skills

  • Programming: Python, C++, Java; familiar with common design patterns (Singleton, Factory, Observer)
  • Deep Learning: PyTorch (research prototyping, training, and deployment); solid foundation in ML/DL
  • Tooling: Linux, Vim/Neovim, CMake; proficient with debugging and version control

💬 Others